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  TESDC5V0 bi-directional esd protection diode small signal diode ? meet iec61000-4-4 (eft) rating. 40a (5/50 ?s) ? protects one birectional i/o line ? working voltage : 5v min max min max 1.20 1.40 0.047 0.055 ? case : sod-323 small outline plastic package 2.50 2.70 0.098 0.106 0.25 0.35 0.010 0.014 1.60 1.80 0.063 0.071 0.80 0.90 0.031 0.035 0.08 0.15 0.003 0.006 ? notebooks, desktops, and servers ? keypads, side keys, usb 2.0, lcd displays ? portable instrumentation ? microprocessor based equipment part no. package packing marking TESDC5V0 sod-323 3k / 7" reel 2b maximum ratings and electrical characteristics maximum ratings electrical characteristics 1ma 5v 5a 24a may vary despending on application. ? meet iec61000-4-2 (esd) 15kv (air), 8kv (contact) packing code rrg ordering information notes: 1. the suggested land pattern dimensions have been provided for reference only, as actual pad layouts min reverse breakdown volta i r = v rwm - 6 v esd c j i r v (br) v r =0v, f=1.0mhz reverse leakage curren i pp = vc suggested pad layout v r = type number sod-323 5 reverse stand-off voltage p pp t j , t stg symbol type number symbol 0.475 ref 0.19 ref 200(typ.) clamping voltage units applications pin configutation ? cell phone handsets and accessories junction capacitance i pp = ? terminal: matte tin plated, lead free., solderable per mil-std-202, method 208 guaranteed ? mounting position: any d features mechanical data ? pb free version, rohs compliant, and halogen free ? high temperature soldering guaranteed: 260 c/10s units rating at 25 c ambient temperature unless otherwise specified. value max kv - peak pulse power (tp=8/20 s waveform) esd per iec 61000-4-2 (air) esd per iec 61000-4-2 (contact) . -55 to + 150 . junction and storage temperature range 500 15 8 v g ? weight : 4.850.5 mg ? marking code : 2b pf w c v v ua unit (inch) dimensions b f c a unit (mm) e - 14.5 9.8 5 - - 0.83 0.63 2.85 1.60 unit : mm version :b11
TESDC5V0 bi-directional esd protection diode small signal diode rating and characteristic curves fig 2 pulse waveform 0 10 20 30 40 50 60 70 80 90 100 110 0 5 10 15 20 25 30 percent of i pp time (us) ambient tempeatature ( o c) reverse voltage (v) fig 4 typical junction capacitance 0 50 100 150 200 250 012345 normalized capacitance 0 5 10 15 20 25 0 5 10 15 20 25 30 clamping voltage (v) fig 5 clamping voltage vs. peak pulse current) peak pulse current (a) waveform parameters: tr = 8 s, td = 20 s waveform parameters: tr = 8 s, td = 20 s fig 3 admissible power dissipation curve 0 20 40 60 80 100 120 0 20 40 60 80 100 120 140 160 180 power rating (%) 0.01 0.1 1 10 0.1 1 10 100 1000 peak pulse power ppp (kw) fig 1 non-repetitive peak pulse power vs. pulse time pulse duration (us) f = 1.0mhz td=ipp/2 e -1 version : b1 1
TESDC5V0 bi-directional esd protection diode small signal diode applications information ? designed to protect sensitive electronics from damage or latch-up due to esd ? designed to replace multilayer varistors (mlvs) in portable applications ? offers superior electrical characteristics such as lower clamping voltage and no device degradation when compared to mlvs circuit board layout recommendations tape & reel specification note 1: a 0, b 0, and k 0 are determined by component size. the clearance between the components and the cavity must be within 0.05 mm min. to 0.5 mm max. the component cannot rote more than 10o within the determined cavity. note 2: if b1 exceeds 4.2 mm(0.165'') for 8 mm embossed tape, the tape may not feed through all tape feeders. overall tape thickness t 0.6 max. tape width w 8.30 max. reel width w1 14.4 max. sprocke hole pitch p0 4.00 0.10 embossment center p1 2.00 0.10 sprocke hole position e 1.75 0.10 punch hole position f 3.50 0.05 reel inner diameter d1 50 min. feed hole width d2 13.0 0.5 sprocket hole d 1.50 +0.10 reel outside diameter a 178 1 item symbol dimension (mm) ? minimize the path length between the esd protection diode and the protected line. ? minimize all conductive loops including power and ground loops. ? designed to protect one data, i/o, or power supply line. ? the combination of small size and high esd surge capability makes them ideal for use in portable applications. good circuit board layout is critical for the suppression of esd induced transients. ? place the esd protection diode near the input terminals or connectors to restrict transient coupling. carrier depth k 2.40 max. ? the esd transient return path to ground should be kept as short as possible. top cover tape carieer tape any additional label (if required) tsc label direction of feed w1 d1 d2 a version : b11 for machine reference only including draft and radll concentric around b 0 t top cover tape see note1 b0 k center lines of cavity f e w for components 2.0mm x 1.2mm and larger d' d p1 p 10 pitches cumulative tolerance on tape 2.0mm ( 0.008") b 0 embossment a 0 k 0 b 1


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